Les effets de la distance sur le discours de l'enseignant et le comportement des apprenants

National audienceIn this paper the authors reanalyse the results of three experiments on distance education. They use Moore’s notion of Transactional Distance (henceforth TD), in which the participants’ perception of distance no longer depends on spatial distance or the use of media, but rather on the three following features: course structure, instructional dialogue and students autonomy. We present the following three experiments, in which the situational variables are more and more controlled: 1) amphitheatre lecture vs. lecture at a distance, 2) amphitheatre lecture with slides vs. lecture at a distance with slides, 3) amphitheatre lecture vs. presentation of the same videotaped lecture. The purpose of these experiments is to highlight the effects of distance on two main dependent variables: teacher discourse and students behaviour. A main hypothesis is tested in this paper: the more controlled the various situational variables are, the more close the two compared teaching situations will be. The results of the studies confirm this hypothesis. In order to show differences among instructional situations, further experiments with more precise variables have to be made.RESUME : L'objet de cet article est de réinterpréter les résultats de trois expérimentations sur l'enseignement à distance dans le cadre théorique de la distance de transaction (DT). Selon cette notion, la perception de la distance entre un enseignant et les apprenants ne dépendrait pas de la distance spatiale, ou même du type de média utilisé. Elle dépend plutôt de trois paramètres : la structure du cours, les possibilités de dialogue entre enseignants et élèves, l'autonomie de ces derniers. Nous avons étudié les effets de la distance en comparant les situations suivantes deux à deux : 1°) cours en amphithéâtre vs cours à distance ; 2°) cours en amphithéâtre avec diaporama vs cours à distance avec diaporama ; 3°) cours en amphithéâtre vs rediffusion de ce cours sur vidéo. Deux variables dépendantes ont été étudiées : le discours de l'enseignant et le comportement des étudiants. Notre hypothèse étant que, plus les comparaisons sont contrôlées, plus les différences entre les deux situations vont être faibles. Nos résultats vont dans ce sens, et il reste à réaliser d'autres études afin de mettre au jour des différences intersituation. ABSTRACT: In this paper the authors reanalyse the results of three experiments on distance education. They use Moore's notion of Transactional Distance (henceforth TD), in which the participants' perception of distance no longer depends on spatial distance or the use of media, but rather on the three following features: course structure, instructional dialogue and students autonomy. We present the following three experiments, in which the situational variables are more and more controlled: 1) amphitheatre lecture vs. lecture at a distance, 2) amphitheatre lecture with slides vs. lecture at a distance with slides, 3) amphitheatre lecture vs. presentation of the same videotaped lecture. The purpose of these experiments is to highlight the effects of distance on two main dependent variables: teacher discourse and students behaviour. A main hypothesis is tested in this paper: the more controlled the variou

FPGA Configuration of Intensive Multimedia Processing Tasks Modeled in UML

Recent research have demonstrate interests in a codesign framework     that allows description refinement at different abstraction level.     We have proposed such a framework that allows SoC resources     allocation for regular and repetitive tasks found in intensive     multimedia applications. Nevertheless, the framework does not directly target     reconfigurable architectures, the difficult job of placing and     routing an application on a FPGA being postponed to a dedicated     tool. In order to limit the number of synthesis on this external     tool, we propose an algorithm that, from a high level description     of an intensive multimedia application, estimates the resource     usages on a given FPGA architecture. This algorithm makes use of a     simple mathematical formalism issued from case study     implementations

Model Driven Engineering Benefits for High Level Synthesis

This report presents the benefits of using the Model Driven Engineering (MDE) methodology to solve major difficulties encountered by usual high level synthesis (HLS) flows. These advantages are highlighted in a design space exploration environment we propose. MDE is the skeleton of our HLS flow dedicated to intensive signal processing to demonstrate the expected benefits of these software technologies extended to hardware design. Both users and designers of the design flow benefit from the MDE methodology, participating to a concrete and effective advancement in the high level synthesis research domain. The flow is automatized from UML specifications to VHDL code generation and has been successfully evaluated for the conception of a video processing application

Implementation of ARTiS, an Asymmetric Real-Time Extension of SMP Linux

ARTiS is a real-time extension of GNU/Linux dedicated to SMP systems (Symmetric Multi-Processors). ARTiS divides the CPUs of an SMP system into two sets: real-time CPUs and non real-time CPUs. Real-time CPUs execute preemptible code only, thus tasks running on these processors perform predictably. If a task wants to enter into a non-preemptible section of code on a real-time processor, ARTiS will automatically migrate this task to a non real-time processor. Furthermore, dedicated load-balancing strategies allow all the system's CPUs to be fully exploited. \par The purpose of this paper is to describe the basic API that has been specified to deploy real-time applications, and to present the current implementation of the ARTiS model, which was achieved through modifications of the 2.6 Linux kernel. The implementation is build around an automatic migration of tasks between real-time and non real-time processors and the use of a load-balancer. The basic function of those mechanisms is to move a task structure from one processor to another. A strong constraint of the implementation is the impossibility for the code running on an RT processor to share a lock or to wait after another processor

Implementation of ARTiS, an Asymmetric Real-Time Extension of SMP Linux

ARTiS is a real-time extension of GNU/Linux dedicated to SMP systems (Symmetric Multi-Processors). ARTiS divides the CPUs of an SMP system into two sets: real-time CPUs and non real-time CPUs. Real-time CPUs execute preemptible code only, thus tasks running on these processors perform predictably. If a task wants to enter into a non-preemptible section of code on a real-time processor, ARTiS will automatically migrate this task to a non real-time processor. Furthermore, dedicated load-balancing strategies allow all the system's CPUs to be fully exploited. \par The purpose of this paper is to describe the basic API that has been specified to deploy real-time applications, and to present the current implementation of the ARTiS model, which was achieved through modifications of the 2.6 Linux kernel. The implementation is build around an automatic migration of tasks between real-time and non real-time processors and the use of a load-balancer. The basic function of those mechanisms is to move a task structure from one processor to another. A strong constraint of the implementation is the impossibility for the code running on an RT processor to share a lock or to wait after another processor

FPGA Implementation of Embedded Cruise Control and Anti-Collision Radar

The ModEasy project seeks to develop techniques and software tools to aid in the development of reliable microprocessor based electronic (embedded) systems using advanced development and verification systems. The tools are to be evaluated in practical domains such as the automotive sector for reactive cruise control and anti-collision radar. We choose to define specific IPs using FPGA techniques to cover this application domain. This paper presents the implementation of such a complex and safety application on a single FPGA. The target system is composed of a reactive cruise control, a detection radar and the associated treatments

ARTiS, an Asymmetric Real-Time Scheduler for Linux on Multi-Processor Architectures

The ARTiS system is a real-time extension of the GNU/Linux scheduler dedicated to SMP (Symmetric Multi-Processors) systems. It allows to mix High Performance Computing and real-time. ARTiS exploits the SMP architecture to guarantee the preemption of a processor when the system has to schedule a real-time task. The implementation is available as a modification of the Linux kernel, especially focusing (but not restricted to) IA-64 architecture. The basic idea of ARTiS is to assign a selected set of processors to real-time operations. A migration mechanism of non-preemptible tasks insures a latency level on these real-time processors. Furthermore, specific load-balancing strategies permit ARTiS to benefit from the full power of the SMP systems: the real-time reservation, while guaranteed, is not exclusive and does not imply a waste of resources. This document describes the theoretical approach of ARTiS as well as the details of the Linux implementation. Several kind of measurements are also presented in order to validate the results

Broadcast with mask on a Massively Parallel Processing on a Chip

workshop drnoc2012The delay of instructions broadcast has a significant impact on the performance of Single Instruction Multiple Data (SIMD) architecture. This is especially true for massively parallel processing Systems-on-Chip (mppSoC), where the processing stage and that of setting up the communication mechanism need several clock periods. Subnetting is the strategy used to partition a single physical network into more than one smaller logical sub-networks (subnets). This technique better controls the broadcast instructions domain and the data traffic between network nodes. Furthermore, it allows to separate synchronous communications from asynchronous processing which maintains reliable communications and rapid processing through parallel processors. This paper describes the design of a communication model called broadcast with mask. This model is dedicated to mppSoC architecture with a huge number of processor elements because it maintains performances even when the number of processors increases. Simulation results and an FPGA implementation validate our approach

L codent, L créent: créations numériques artistiques pour démystifier l'informatique... au féminin! (descriptif d’atelier)

International audienceLe secteur informatique connaît un déséquilibre importante de genre malgré une forte implication de femmesau début du développement de l’informatique à la fin des années 1950. Ce phénomène s’est accéléré dans lesannées 1980 et depuis la situation continue à se détériorer. Afin de lutter contre cette tendance, le groupe detravail « Informatique au féminin » et le collectif "ch’ticode" de l’Université de Lille - Sciences & Technologies ontexpérimenté une action de médiation en informatique à destination de collégiennes encadrées par des étudiantesinformaticiennes. L’atelier permettra aux participants de découvrir les activités proposées et l’organisation del’activité, ainsi qu’un retour d’expérience sur cette première saison qui est renouvelée cette année et sera étendueà un lycée